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FDS3512
May 2001
FDS3512
80V N-Channel PowerTrench(R) MOSFET
General Description
This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. These MOSFETs feature faster switching and lower gate charge than other MOSFETs with comparable RDS(ON) specifications. The result is a MOSFET that is easy and safer to drive (even at very high frequencies), and DC/DC power supply designs with higher overall efficiency.
Features
* 4.0 A, 80 V RDS(ON) = 70 m @ VGS = 10 V RDS(ON) = 80 m @ VGS = 6 V
* Low gate charge (13nC Typical) * Fast switching speed * High performance trench technology for extremely low RDS(ON) * High power and current handling capability
D D
D
D
5 6 7
4 3 2 1
SO-8
S
S
S
G
8
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD
TA=25oC unless otherwise noted
Parameter
Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Power Dissipation for Single Operation
(Note 1a) (Note 1b) (Note 1c) (Note 1a)
Ratings
80 20 4.0 30 2.5 1.2 1.0 -55 to +175
Units
V V A W
TJ, TSTG
Operating and Storage Junction Temperature Range
C
Thermal Characteristics
RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
50 25
C/W C/W
Package Marking and Ordering Information
Device Marking FDS3512 Device FDS3512 Reel Size 13'' Tape width 12mm Quantity 2500 units
2001 Fairchild Semiconductor Corporation
FDS3512 Rev B1 (W)
FDS3512
Electrical Characteristics
Symbol
W DSS IAR
TA = 25C unless otherwise noted
Parameter
Single Pulse Drain-Source Avalanche Energy Maximum Drain-Source Avalanche Current Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward Gate-Body Leakage, Reverse
(Note 2)
Test Conditions
VDD = 40 V, ID = 4.0 A
Min
Typ
Max Units
90 4.0 mJ A
Drain-Source Avalanche Ratings (Note 2)
Off Characteristics
BVDSS BVDSS TJ IDSS IGSSF IGSSR VGS = 0 V, ID = 250 A 80 80 1 100 -100 V mV/C A nA nA ID = 250 A, Referenced to 25C VDS = 64 V, VGS = 0 V VGS = 20 V, VDS = 0 V VGS = -20 V, VDS = 0 V ID = 250 A
On Characteristics
VGS(th)n VGS(th) TJ RDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance
VDS = VGS,
2
2.4 -6 50 55 91
4
V mV/C
ID = 250 A, Referenced to 25C VGS = 10 V, VGS = 6 V, VGS = 10 V, VGS = 10 V, ID = 4.0 A ID = 3.7A ID = 4.0 A, TJ = 125C VDS = 5 V
70 80 135
m
ID(on) GFS
20 14
A S
VGS = 10 V, ID = 4.0 A
Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 2)
VDS = 40 V, V GS = 0 V, f = 1.0 MHz
634 58 28
pF pF pF
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VDD = 40 V, ID = 1 A, VGS = 10 V, RGEN = 6
7 3 24 4
14 6 38 8 18
ns ns ns ns nC nC nC
VDS = 40 V, ID = 4.0 A, VGS = 10 V
13 2.4 2.8
Drain-Source Diode Characteristics and Maximum Ratings
IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.1 A
(Note 2)
2.1 0.8 1.2
A V
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a) 50 C/W when mounted on a 1in2 pad of 2 oz copper
b) 105 C/W when mounted on a 0.04 in2 pad of 2 oz copper
c) 125 C/W when mounted on a minimum pad.
2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%
FDS3512 Rev B1 (W)
FDS3512
Typical Characteristics
20
1.8
6.0V
ID, DRAIN CURRENT (A) 15
4.5V
RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
VGS = 10V
5.0V
1.6
VGS = 4.0V
1.4
4.0V
10
4.5V 5.0V
1.2
6.0V
1
10V
5
0 0 1 2 3 4 5 VDS, DRAIN-SOURCE VOLTAGE (V)
0.8 0 5 10 ID, DRAIN CURRENT (A) 15 20
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.18 RDS(ON), ON-RESISTANCE (OHM)
2.5 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 2.2 1.9 1.6 1.3 1 0.7 0.4 -50 -25 0 25 50 75 100
o
ID = 4A VGS = 10V
ID =2A
0.14
TA = 125oC
0.10
0.06
TA = 25oC
0.02
125
150
175
2
4
6
8
10
TJ, JUNCTION TEMPERATURE ( C)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
20
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
100
VDS = 5V
ID, DRAIN CURRENT (A) 15
IS, REVERSE DRAIN CURRENT (A)
VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001
10
TA = 125oC
5
25oC -55 C
0 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V)
o
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDS3512 Rev B1 (W)
FDS3512
Typical Characteristics
10 VGS, GATE-SOURCE VOLTAGE (V) ID = 4A 8 CAPACITANCE (pF) 60V 6 VDS = 20V 40V
1000 f = 1MHz VGS = 0 V 800 CISS 600
4
400
2
200 CRSS
COSS
0 0 3 6 9 12 15 Qg, GATE CHARGE (nC)
0 0 20 40 60 80 VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100 P(pk), PEAK TRANSIENT POWER (W) 50 RDS(ON) LIMIT 10 10ms 1 VGS = 10V SINGLE PULSE RJA = 125oC/W TA = 25oC 0.01 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) 100ms 1s 10s DC
Figure 8. Capacitance Characteristics.
ID, DRAIN CURRENT (A)
100s 1ms
40
SINGLE PULSE RJA = 125C/W TA = 25C
30
20
0.1
10
0 0.001
0.01
0.1
1 t1, TIME (sec)
10
100
1000
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5 0.2
0.1
0.1 0.05 0.02 0.01
RJA(t) = r(t) + RJA RJA = 125 C/W P(pk) t1 t2
SINGLE PULSE
0.01
TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2
0.001 0.0001
0.001
0.01
0.1
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
FDS3512 Rev B1 (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MICROWIRETM OPTOLOGICTM
OPTOPLANARTM PACMANTM POPTM PowerTrench QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER SMART STARTTM StealthTM
SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM UHCTM UltraFET VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H2

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